Why Computer Memory Needs Padding

Modern CPUs are designed to read memory most efficiently when data is properly aligned. While it's technically possible to read individual bytes from any address, doing so can severely impact performance and, on some architectures, even cause crashes.

Let's understand why through an example. Imagine we have a 32-bit integer stored at memory address 1:

1#include <iostream>
2
3struct Unaligned {
4  char A;// at offset 0
5  int Value;// at offset 1 (unaligned!)
6};
7
8int main() {
9  Unaligned Data;
10  Data.A = 'X';
11  Data.Value = 42;
12
13  std::cout << "Size with alignment: "
14    << sizeof(Unaligned) << " bytes\n";
15}

1Size with alignment: 8 bytes

When the CPU needs to read Value, it has to:

1. Read bytes 1-4 (crossing a 4-byte boundary)
2. Perform additional operations to combine these bytes
3. Use more complex circuitry that handles unaligned access

Instead, with padding:

1Offset: 0  1  2  3  4  5  6  7
2        A  _  _  _  V  V  V  V
3          ^Padding^ ^--Value--^

The CPU can now:

1. Read all 4 bytes of Value in a single operation
2. Use simpler circuitry optimized for aligned access
3. Better utilize the cache line

This is why the compiler adds 3 bytes of padding after A - the small space "wasted" by padding is far outweighed by the performance benefits of aligned access.